Java2Vhdl translator - tools and example

package org.vishia.fpga.exmplBlinkingLed.fpgatop;

import org.vishia.fpga.stdmodules.Reset;
import org.vishia.fpga.Fpga;
import org.vishia.fpga.FpgaModule_ifc;
//Note: Do not use a package.path.*, not yet supported by Java2Vhdl
import org.vishia.fpga.exmplBlinkingLed.modules.BlinkingLedCfg_ifc;
import org.vishia.fpga.exmplBlinkingLed.modules.BlinkingLedCt;
import org.vishia.fpga.exmplBlinkingLed.modules.ClockDivider;

public class BlinkingLed_Fpga implements FpgaModule_ifc {

public interface FpgaModule_ifc {
  void step(int time);
  
  void update();
  
  
}

  /**The modules which are part of this Fpga for test. */
  public class Modules {
    
    /**The i/o pins of the top level FPGA should have exact this name ioPins. */
    public BlinkingLed_FpgaInOutput ioPins = new BlinkingLed_FpgaInOutput();
    
    /**Build a reset signal high active for reset. Initial or also with the reset_Pin. 
     * This module is immediately connected to one of the inputFpga pins
     * via specific interface, see constructor argument type.
     */
    public final Reset res = new Reset(this.ioPins.reset_Inpin);
    
    public final ClockDivider ce = new ClockDivider();
    
    public final BlinkingLedCt ct = new BlinkingLedCt(this.res, BlinkingLed_Fpga.this.blinkingLedCfg, this.ce);    //cfg implemented in extra class in this file.
    
    Modules ( ) {
      //aggregate the module afterwards
      this.ct.init(this.res, BlinkingLed_Fpga.this.blinkingLedCfg, this.ce);    //cfg implemented in extra class in this file.
    }
  }

  public final Modules ref;

  @Override
  public void step(int time) {
    this.ref.res.step(time);
    this.ref.ce.step(time);
    this.ref.ct.step(time);
    
  }


  @Override
  public void update() {
    this.ref.res.update();
    this.ref.ce.update();
    this.ref.ct.update();
    this.ref.ioPins.output.led1 = this.ref.ct.ledBlinking();
    this.ref.ioPins.output.led2 = this.ref.ct.getLedFast.getBit();
    this.ref.ioPins.output.led3 = Fpga.getBits(this.ref.ct.ct(), 2,0) != 0b000;
  }

  /**Provides the used possibility for configuration values.
   */
  @Fpga.IfcAccess BlinkingLedCfg_ifc blinkingLedCfg = new BlinkingLedCfg_ifc ( ) {
    
    @Override @Fpga.BITVECTOR(8) public int time_BlinkingLed() {
      return 0x64;
    }

    @Override public int onDuration_BlinkingLed() {
      return 10;
    }

    @Override
    public int time() { return 0; }  // set from beginning

  };

  /**The modules which are part of this Fpga for test. */
  public class Modules {
    
    /**The i/o pins of the top level FPGA should have exact this name ioPins. */
    public BlinkingLed_FpgaInOutput ioPins = new BlinkingLed_FpgaInOutput();

package org.vishia.fpga.exmplBlinkingLed.fpgatop;

import org.vishia.fpga.Fpga;
import org.vishia.fpga.stdmodules.Reset_Inpin_ifc;

public class BlinkingLed_FpgaInOutput {

  public static class Input {

    /**A low active reset pin, usual also the PROGR pin. 
     * Because of the specific function the access should only be done with the here defined access operation, hold it package private, not public. 
     * For test it can be accessed in a test access class in the same package.*/
    boolean reset_Pin;
  }

  
  public static class Output {
    
    /**Ordinary output pins, use public in responsible to top level design sources. */
    public boolean led1, led2, led3;
  }
  
  /**This instances are final and public accessible. 
   * The inputs should be used in the step operations as given on start of D-calculation.
   */
  public final Input input = new Input(); 
  
  /**The outputs should be set in the update() operation of the top level with the Q-Values of FlipFlops. */
  public final Output output = new Output(); 

    this.ref.ioPins.output.led1 = this.ref.ct.ledBlinking();
    this.ref.ioPins.output.led2 = this.ref.ct.getLedFast.getBit();
    this.ref.ioPins.output.led3 = Fpga.getBits(this.ref.ct.ct(), 2,0) != 0b000;

package org.vishia.fpga.stdmodules;

import org.vishia.fpga.Fpga;

/**This is a very common interface only for one bit for any usage.
 * For some reason an input is necessary and an output is offered,
 * but the connection from the input to the output is determined not by a module,
 * It is determined by the interconnection of modules.
 * In such cases a specialized interface should not be used.
 * The connection should be proper for any plug.
 * The responsibility of the correctness of the connection is associated to the interconnection design only.
 * <br>
 * The implementor should have the annotation <code>@Fpga.IfcAccess</code>, example:
 * <pre>
  public @Fpga.IfcAccess Bit_ifc txReqMaster = new Bit_ifc ( ) {
    @Override public boolean getBit() { 
      return SpiMaster.this.spiM.stateCmd;  
    }
  };
 * </pre>
 * @author Hartmut Schorrig
 *
 */
public interface Bit_ifc {

  boolean getBit ( );
}

  /**Get the reset pin as referenced interface access from a module.
   * Using the {@link org.vishia.fpga.stdmodules.Reset} may be seen as recommended because it clarifies a longer reset signal.
   */
  @Fpga.IfcAccess public Reset_Inpin_ifc reset_Inpin = new Reset_Inpin_ifc () {
    @Override public boolean reset_Pin() { return BlinkingLed_FpgaInOutput.this.input.reset_Pin; }
  };

package org.vishia.fpga.exmplBlinkingLed.fpgatop;

/**This class is only for test to access Pins in {@link BlinkingLed_FpgaInOutput}
 * @author Hartmut Schorrig
 *
 */
public class BlinkingLed_IoAcc {

  /**Operation to set the reset Inpin, with the hint that this pin is low active.
   * @param val the immediately pin value, true for high, inactive.  */
  public static void setLowactive_reset_Inpin(BlinkingLed_Fpga fpga, boolean val) { 
    fpga.ref.ioPins.input.reset_Pin = val; 
  }
  
}

package org.vishia.fpga.exmplBlinkingLed.modules;

import org.vishia.fpga.Fpga;
import org.vishia.fpga.FpgaModule_ifc;
import org.vishia.fpga.stdmodules.Bit_ifc;
import org.vishia.fpga.stdmodules.Reset_ifc;
import org.vishia.fpga.testutil.TestSignalRecorder;
import org.vishia.util.StringFunctions_C;

import java.io.IOException;

public class BlinkingLedCt implements FpgaModule_ifc, BlinkingLed_ifc {

  private static class Ref {

    /**Common module for save creation of a reset signal. */
    final Reset_ifc reset;
    
    final BlinkingLedCfg_ifc cfg;
    
    /**Specific module for clock pre-division. */
    final ClockDivider clkDiv;
    
    Ref(Reset_ifc reset, BlinkingLedCfg_ifc cfg, ClockDivider clkDiv) {
      this.reset = reset;
      this.cfg = cfg;
      this.clkDiv = clkDiv;
    }
  }
  
  private Ref ref;

  @Fpga.VHDL_PROCESS private static final class Q{

    @Fpga.STDVECTOR(16) final int ctLow;
    @Fpga.STDVECTOR(8) final int ct;
    final boolean led;
    int time; 
    
    Q() {
      this.ctLow = 0;
      this.ct = 0;
      this.led = false;
      this.time = 0;
    }
    
    @Fpga.VHDL_PROCESS Q(int time, Q z, Ref ref) {
      Fpga.checkTime(time, ref.clkDiv.q.time, 1);  // for the ce signal, constraint with 1 clock delay.
      if(ref.clkDiv.q.ce) {
        Fpga.checkTime(time, z.time, 20);        // check whether all own process signals are persistent since 20 time steps.
        Fpga.checkTime(time, ref.cfg.time(), 20);// check all signals from the referenced module. 
        this.time = time;                        // all variables are declared as possible set with this time stamp.
        if(ref.reset.reset(time, 20)) {          // interface access to assigned here unknown reset module
          this.ct = ref.cfg.time_BlinkingLed();
          this.ctLow = 0x0000;    
        }                                     // underflow detection to 111.... as simple hardware-saving solution. The counter itself can use a carry-logic. 
        else if(Fpga.getBits(z.ctLow, 15, 13)==0b111) {    // check only 3 bits and not all bits =0
          this.ctLow = 0x61a7;  // 24999;                  // Period 25 ms, hint cannot use the range 0xe000..0xffff to prevent immediately underflow detection
          //                    // TODO should convert automatically also a given INTEGER constant to STD_LOGIC_VECTOR
          if(z.ct == 0x00) {                     // here a full 0 test with 8 bit is done. effort in hardware.
            this.ct = ref.cfg.time_BlinkingLed();// interface access to the reload value
          } else {
            this.ct = z.ct -1;                   // high counter normally count down automatically proper implemented in FPGA
          }
        }
        else {
          this.ctLow = z.ctLow -1;               // count down automatically proper implemented in FPGA
          this.ct = z.ct;                        // high counter copy the state (not generated to VHDL, it is implicitely there)
        }
        this.led = z.ct < ref.cfg.onDuration_BlinkingLed(); //set FF after comparison with 8 bit.
      }
      else {                                     // clock enable ce == false
        this.ct = z.ct;                          // copy the state (not generated in VHDL)
        this.ctLow = z.ctLow;
        this.led = z.led;
        this.time = z.time;
      }
    }
  }
  
  private Q q = new Q();
  private Q d_q;     

TYPE BlinkingLedCt_Q_REC IS RECORD
  ctLow : STD_LOGIC_VECTOR(15 DOWNTO 0);
  ct : STD_LOGIC_VECTOR(7 DOWNTO 0);
  led : BIT;
END RECORD BlinkingLedCt_Q_REC;

  public class Modules {
    ....
    public final BlinkingLedCt ct = new BlinkingLedCt(....

SIGNAL ce_Q : ClockDivider_Q_REC;
SIGNAL ct_Q : BlinkingLedCt_Q_REC;
SIGNAL res_Q : Reset_Q_REC;

ct_Q_PRC: PROCESS ( clk )
BEGIN IF(clk'event AND clK='1') THEN

  IF ce_Q.ce='1' THEN
      IF (res_Q.res)='1' THEN
          ct_Q.ct <= TO_STDLOGICVECTOR(BlinkingLed_Fpga_time_BlinkingLed);
      ELSE
        IF ct_Q.ctLow(15 DOWNTO 13) =  "111"  THEN
            ct_Q.ctLow <=  x"61a7";
            IF ct_Q.ct = x"00"  THEN
                ct_Q.ct <= TO_STDLOGICVECTOR(BlinkingLed_Fpga_time_BlinkingLed);
        ELSE
                ct_Q.ct <=  ct_Q.ct - 1 ;
            END IF;
        ELSE
            ct_Q.ctLow <=  ct_Q.ctLow - 1 ;
        END IF;
      END IF;
      IF ct_Q.ct < BlinkingLed_Fpga_onDuration_BlinkingLed  THEN ct_Q.led  <=  '1'; ELSE ct_Q.led  <=  '0'; END IF;
  ELSE
  END IF;
END IF; END PROCESS;

  @Override
  public void step(int time) {
    if(this.ref.clkDiv.q.ce) {             // speed up simulation, only on ce the data are calculated new.
      this.d_q = new Q(time, this.q, this.ref);
    } else {
      this.d_q = this.q;
    }
  }

  @Override
  public void update() {
    this.q = this.d_q;
  }

  /**Implementation of a given interface which is also fulfilled by this module. 
   * @return value for a led which should be blinking.
   */
  @Override public boolean ledBlinking() { return this.q.led; }

  /**This is an example for an access operation only for this module,
   * without abstraction of using an interface.
   * Hence it is only defined for this module, not with a universal interface,
   * it should be used especially for necessary test outputs wich have only meaning using this module,
   * not for input interfaces for other modules.
   * @return the counter.
   */
  @Fpga.GetterVhdl public int ct() { return this.q.ct; }
  //@Fpga.BITVECTOR(8) //TODO evaluate it 

    this.ref.ioPins.output.led1 = this.ref.ct.ledBlinking();
    this.ref.ioPins.output.led2 = this.ref.ct.getLedFast.getBit();
    this.ref.ioPins.output.led3 = Fpga.getBits(this.ref.ct.ct(), 2,0) != 0b000;

  public @Fpga.IfcAccess Bit_ifc getLedFast = new Bit_ifc ( ) {
    @Override public boolean getBit() {
      return Fpga.getBits(BlinkingLedCt.this.q.ct, 2,0) == 0b000;
    }
  };

  public class TestSignals extends TestSignalRecorder {
    ....
  }

package org.vishia.fpga.exmplBlinkingLed.test;

import java.io.FileWriter;
import java.io.IOException;
import java.io.Writer;

import org.vishia.fpga.exmplBlinkingLed.fpgatop.BlinkingLed_Fpga;
import org.vishia.fpga.exmplBlinkingLed.fpgatop.BlinkingLed_IoAcc;
import org.vishia.fpga.testutil.CheckOper;
import org.vishia.fpga.testutil.TestSignalRecorder;
import org.vishia.fpga.testutil.TestSignalRecorderSet;
import org.vishia.util.TestOrg;

public class Test_BlinkingLed {

  BlinkingLed_Fpga fpga = new BlinkingLed_Fpga();

  TestSignalRecorderSet outH;
  
  
  void test_All ( TestOrg testParent) throws IOException {
    this.outH = new TestSignalRecorderSet();
    this.outH.registerRecorder(this.fpga.ref.ct.new TestSignals("ct"));
    this.outH.registerRecorder(this.new TestSignals("io"));
    this.outH.clean();

    TestOrg test = new TestOrg("testTxSpe", 6, testParent);

    BlinkingLed_IoAcc.setLowactive_reset_Inpin( this.fpga, true);           // reset inactive high as only one input

    int time = 0;
    while(++time < 120000000) {
      this.fpga.step(++time);
      this.fpga.update();
      if(this.fpga.ref.ce.q.ce) {             // speed up simulation, only on ce the data are calculated new.
        this.outH.addSignals(time);
      }
    }

    this.outH.output(System.out);
    Writer fout = new FileWriter("build/test_BlinkingLed_Signals.txt");
    this.outH.output(fout);
    fout.close();

    CheckOper.CharMinMax[] checkLedA = { new CheckOper.CharMinMax('_', 200, 9999), new CheckOper.CharMinMax('A', 200, 300)};
    //Note: a shorter low phase of LedB occurs on overflow of the high bit counter.
    CheckOper.CharMinMax[] checkLedB = { new CheckOper.CharMinMax('_', 26, 200 ), new CheckOper.CharMinMax('B', 26,26)};
    String error = CheckOper.checkOutput(this.outH.getLine("io.ledA"), 20, checkLedA);
    test.expect(error == null, 5, "LedA off 200.. chars, on 200..300 chars" + (error ==null ? "" : " ERROR: " + error) );
    error = CheckOper.checkOutput(this.outH.getLine("io.ledB"), 20, checkLedB);
    test.expect(error == null, 5, "LedB off 180..200 chars, on 26 chars" + (error ==null ? "" : " ERROR: " + error));
    
    test.finish();

  public static void main(String[] args) {
    Test_BlinkingLed thiz = new Test_BlinkingLed();
    TestOrg test = new TestOrg("Test_BlinkingLed", 3, args);
    try {
      thiz.test_All(test);
    }
    catch(Exception exc) {
      System.out.println(exc.getMessage());
      exc.printStackTrace();
      test.exception(exc);
    }
    test.finish();
  }

  class TestSignals extends TestSignalRecorder {

    StringBuilder sbLedA = new StringBuilder(500);
    StringBuilder sbLedB = new StringBuilder(500);
    
    private char cLedA, cLedB;
    
    /**This instance should be added on end using {@link TestSignalRecorderSet#registerRecorder(TestSignalRecorder)}
     * because it decides adding an information only depending of other SignalRecorders.
     * @param sModule name, first part of line identifier
     */
    public TestSignals(String sModule) {
      super(sModule);
    }

    /**cleans all StringBuilder line and registered it. */
    @Override public void registerLines ( ) {
      super.clean();
      super.registerLine(this.sbLedA, "ledA");
      super.registerLine(this.sbLedB, "ledB");
    }
    
    @Override public int addSignals ( int time, int lenCurr, boolean bAdd) throws IOException {
      BlinkingLed_Fpga fpga = Test_BlinkingLed.this.fpga;
      if(bAdd) {                                  //only calculate state if another line has additional information.
        if(fpga.ref.ioPins.output.led1) {
          if(fpga.ref.ioPins.output.led1) {
          }  
        }
        this.cLedA = fpga.ref.ioPins.output.led1 ? 'A': '_';
        this.cLedB = fpga.ref.ioPins.output.led2 ? 'B': '_';
        this.sbLedA.append(this.cLedA);
        this.sbLedB.append(this.cLedB);
        return this.sbLedA.length();
      } else {
        return 0;  // no own contribution to length, regard add, sub ordinate.
      }
    }
    
    
    /**This operation is here overridden to add the character of the led state instead adding spaces as separator. 
     * It will be called in {@link TestSignalRecorderSet#addSignals(int)} after info to all lines are added.
     * Which character is added, this is determined by addSignals above in this class. */
    @Override protected void endSignals ( int pos) {
      while(this.sbLedA.length() < pos) { this.sbLedA.append(this.cLedA); }
      while(this.sbLedB.length() < pos) { this.sbLedB.append(this.cLedB); }
    }
    
  }

    @Override public int addSignals ( int time, int lenCurr, boolean bAdd ) throws IOException {
      BlinkingLedCt thism = BlinkingLedCt.this;
      int zCurr = this.sbCt.length(); // current length for this time
      int zAdd = 0;                   // >0 then position of new length for this time
      if(thism.ref.clkDiv.q.ce) {       // because the own states switches only with this ce, the signals should also recorded only then.
        if(thism.q.ctLow == 1) {        // on this condition
          this.wrCt = 5;              // switch on, write 5 steps info
        }
        if(--this.wrCt >0) {          // if one of the 5 infos shouls be written:
          StringFunctions_C.appendHex(this.sbCtLow, thism.q.ctLow,4).append(' ');    //append info
          StringFunctions_C.appendHex(this.sbCt, thism.q.ct,2);                      //append info
          if(checkLen(this.sbtime, zCurr)) {      // add the time information if here is space.
            StringFunctions_C.appendIntPict(this.sbtime, time, "33'331.111.11");   // append time info
          }
          zAdd = this.sbCtLow.length();  //length of buffers for new time determined by the sbCtLow, the longest entry.
        } 
        else if(this.wrCt ==0) {         // end of the 5 steps, append .... as separation
          this.sbCtLow.append("..... ");
          zAdd = this.sbCtLow.length();  //length of buffers for new time determined by the sbCtLow, the longest entry.
        }
      }// if ce
      return zAdd;       // will be used in TestSignalRecorderSet.addSignals(zAdd) to set all lines to this length
    }//addSignals

  /**Stores the state for special tests.
   * You can use this implementation as template for your modules.
   */
  public static class Store extends StateStoreFpga < Reset > {
    final Q q;

    /**Creates a Store instance, which refers the data from the {@link Reset#q} instance,
     * it is the PROCESS data, able to call after a defined simulation procedure,
     * to resume later exact from this state.
     * @param time The time stamp of the simulation
     * @param src The reference to the module.
     */
    public Store(int time, Reset src) {
      super(time, src);
      this.q = src.q;
    }

    /**Restore the state to the same module, which is used on creation.
     * It is presumed that the {@link Reset#q} instance was not changed meanwhile.
     * However, this is guaranteed if the Application Pattern Style Guide is followed,
     * and also because all members in {@link Reset.Q} are <code>final</code>.
     */
    @Override public int restore() {
      super.dst.q = this.q;
      return super.time;
    }
  }